中圖分類號(hào)：TN919；TP336 文獻(xiàn)標(biāo)志碼：A DOI: 10.16157/j.issn.0258-7998.245386 中文引用格式： 杜審言，付雷雷. SerDes鏈路協(xié)同仿真與無(wú)源鏈路優(yōu)化設(shè)計(jì)[J]. 電子技術(shù)應(yīng)用，2025，51(1)：25-28. 英文引用格式： Du Shenyan，F(xiàn)u Leilei. SerDes link co-simulation and passive link optimization design[J]. Application of Electronic Technique，2025，51(1)：25-28.
SerDes link co-simulation and passive link optimization design
Du Shenyan，F(xiàn)u Leilei
Celestial Microsystems（Shanghai） Co.， LTD.
Abstract： As the signal transmission rate of the SerDes link increases, the signal integrity (SI) challenge increases further as the channel link passes through PKG and PCB boards, through holes, AC capacitors and connectors. This paper provides a transmission system based on SerDes 32 Gbps-NRZ channel, optimizes the design of BGA holes in passive channels, AC coupling capacitor pad, and Pin pins of FMC connectors, improves the impedance consistency in channels, and establishes a more accurate passive link channel model, combined with the active IBIS-AMI model of the chip, the influence of the optimized channel on the eye image is compared and analyzed, which ensures the stable transmission of 32 Gbps-NRZ high-speed signal.
Key words : SerDes；passive link analysis；eye image simulation；IBIS-AMI model
